Solar cells based on arrays of Si micro- or nanowires have been proposed as a potentially low-cost alternative to conventional wafer-based Si solar cells. See reference [1], incorporated herein by reference in its entirety.
A large-area, solid-state, Si wire-array solar cell requires the formation of a radial or axial p-n junction within each wire. However, the formation or deposition of a monolithic p-n junction across the wire array (as suggested, for example, in reference [2], incorporated herein by reference in its entirety) is prone to shunting, as it provides no electrical isolation between adjacent wires and damaged areas of the array or substrate. Furthermore, a radial junction that extends to the bottom of each wire would greatly complicate the formation of backside electrical contacts to a polymer-embedded, peeled-off wire array. This is because a non-selective contact to the bottom of each wire would contact both the n- and p-type regions, effectively shunting the junction.